From a7ea94cd56236716b8204a9068d16ea335fa9d44 Mon Sep 17 00:00:00 2001
From: Eyck-Alexander Jentzsch <alex@minres.com>
Date: Tue, 31 Mar 2026 23:22:17 +0200
Subject: [PATCH] adds functionality of 7f80906 to other priv wrappers

---
 src/iss/arch/riscv_hart_msu_vp.h | 2 +-
 src/iss/arch/riscv_hart_mu_p.h   | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/iss/arch/riscv_hart_msu_vp.h b/src/iss/arch/riscv_hart_msu_vp.h
index c0e3706..ee0b799 100644
--- a/src/iss/arch/riscv_hart_msu_vp.h
+++ b/src/iss/arch/riscv_hart_msu_vp.h
@@ -488,7 +488,7 @@ template <typename BASE, features_e FEAT> void riscv_hart_msu_vp<BASE, FEAT>::ch
     bool mie = this->state.mstatus.MIE;
     auto m_enabled = this->reg.PRIV < PRIV_M || (this->reg.PRIV == PRIV_M && mie);
     auto enabled_interrupts = m_enabled ? ena_irq & ~ideleg : 0;
-
+    this->reg.pending_trap = 0;
     if(enabled_interrupts == 0) {
         auto sie = this->state.mstatus.SIE;
         auto s_enabled = this->reg.PRIV < PRIV_S || (this->reg.PRIV == PRIV_S && sie);
diff --git a/src/iss/arch/riscv_hart_mu_p.h b/src/iss/arch/riscv_hart_mu_p.h
index 5092813..8f4818b 100644
--- a/src/iss/arch/riscv_hart_mu_p.h
+++ b/src/iss/arch/riscv_hart_mu_p.h
@@ -401,7 +401,7 @@ template <typename BASE, features_e FEAT> void riscv_hart_mu_p<BASE, FEAT>::chec
     bool mstatus_mie = this->state.mstatus.MIE;
     auto m_enabled = this->reg.PRIV < PRIV_M || mstatus_mie;
     auto enabled_interrupts = m_enabled ? ena_irq : 0;
-
+    this->reg.pending_trap = 0;
     if(enabled_interrupts != 0) {
         int res = 0;
         while((enabled_interrupts & 1) == 0) {